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 SN74LS257B SN74LS258B Quad 2-Input Multiplexer with 3-State Outputs
The LSTTL / MSI SN74LS257B and the SN74LS258B are Quad 2-Input Multiplexers with 3-state outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the selected data in true (non-inverted) form. The outputs may be switched to a high impedance state with a HIGH on the common Output Enable (EO) Input, allowing the outputs to interface directly with bus oriented systems. It is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families.
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LOW POWER SCHOTTKY
* * * * * *
Schottky Process For High Speed Multiplexer Expansion By Tying Outputs Together Non-Inverting 3-State Outputs Input Clamp Diodes Limit High Speed Termination Effects Special Circuitry Ensures Glitch Free Multiplexing ESD > 3500 Volts
16 1
GUARANTEED OPERATING RANGES
Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current - High Output Current - Low Min 4.75 0 Typ 5.0 25 Max 5.25 70 - 2.6 24 Unit V C mA mA
16
PLASTIC N SUFFIX CASE 648
1
SOIC D SUFFIX CASE 751B
ORDERING INFORMATION
Device SN74LS257BN SN74LS257BD SN74LS258BN SN74LS258BD Package 16 Pin DIP 16 Pin 16 Pin DIP 16 Pin Shipping 2000 Units/Box 2500/Tape & Reel 2000 Units/Box 2500/Tape & Reel
(c) Semiconductor Components Industries, LLC, 1999
1
December, 1999 - Rev. 6
Publication Order Number: SN74LS257B/D
SN74LS257B SN74LS258B
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC 16 E0 15 I0c 14 I1c 13 Zc 12 I0d 11 I1d 10 Zd 9
SN74LS257B
VCC = PIN 16 GND = PIN 8
1 S VCC 16
2 I0a E0 15
3 I1a I0c 14
4 Za I1c 13
5 I0b Zc 12
6 I1b I0d 11
7 Zb I1d 10
8 GND Zd 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
SN74LS258B
1 S
2 I0a
3 I1a
4 Za
5 I0b
6 I1b
7 Zb
8 GND
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2
SN74LS257B SN74LS258B
LOGIC DIAGRAMS SN74LS257B
E0
15
I0a
2
I1a
3
I0b
5
I1b
6
I0c
14
I1c
13
I0d
11
I1d
10
S
1
4
7
12
9
Za
Zb
Zc
Zd
SN74LS258B
E0
15
I0a
2
I1a
3
I0b
5
I1b
6
I0c
14
I1c
13
I0d
11
I1d
10
S
1
VCC = PIN 16 GND = PIN 8 = PIN NUMBERS
4
7
12
9
Za
Zb
Zc
Zd
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3
SN74LS257B SN74LS258B
FUNCTIONAL DESCRIPTION
The LS257B and LS258B are Quad 2-Input Multiplexers with 3-state outputs. They select four bits of data from two sources each under control of a Common Data Select Input. When the Select Input is LOW, the I0 inputs are selected and when Select is HIGH, the I1 inputs are selected. The data on the selected inputs appears at the outputs in true (non-inverted) form for the LS257B and in the inverted form for the LS258B. The LS257B and LS258B are the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select Input. The logic equations for the outputs are shown below:
LS257B Za = E 0 * Zc = E0 * (I1a * S + I0a * S) Zb = E0 * (I1b * S + I0b * S) (I1c * S + I0c * S) Zd = E0 * (I1d * S + I0d * S)
When the Output Enable Input (E0) is HIGH, the outputs are forced to a high impedance "off" state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-state devices whose outputs are tied together are designed so there is no overlap.
LS258B Za = E 0 * Zc = E0 *
(I1a * S + I0a * S) Zb = E0 * (I1c * S + I0c * S) Zd = E0 *
(I1b * S + I0b * S) (I1d * S + I0d * S)
TRUTH TABLE
OUTPUT ENABLE EO H L L L L SELECT INPUT S X H H L L DATA INPUTS I0 X X X L H I1 X L H X X OUTPUTS LS257B Z (Z) L H L H OUTPUTS LS258B Z (Z) H L H L
H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care (Z) = High Impedance (off)
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4
SN74LS257B SN74LS258B
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 2.4 - 0.65 3.1 0.25 VO OL IOZH IOZL Output LOW Voltage 0.35 Output Off Current -- HIGH Output Off Current -- LOW Input HIGH Current Other Inputs S Inputs Other Inputs S Inputs IIL IOS Input LOW Current All Inputs Short Circuit Current (Note 1) Power Supply Current Total, Output HIGH ICC Total, Output LOW Total, Output 3-State LS257B LS258B LS257B LS258B LS257B LS258B 10 9.0 16 14 19 16 mA VCC = MAX - 30 0.5 20 - 20 20 40 0.1 0.2 - 0.4 - 130 V A A A IOL = 24 mA 0.4 Min 2.0 0.8 - 1.5 Typ Max Unit V V V V V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = - 18 mA VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table IOL = 12 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table
VCC = MAX, VOUT = 2.7 V VCC = MAX, VOUT = 0.4 V VCC = MAX, VIN = 2.7 V
IIH
mA mA mA
VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX
mA mA
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25C, VCC = 5.0 V) See SN74LS251 for Waveforms
Limits Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPLZ tPHZ Parameter Propagation Delay, Data to Output Propagation Delay, Select to Output Output Enable Time to HIGH Level Output Enable Time to LOW Level Output Disable Time to LOW Level Output Disable Time from HIGH Level Min Typ 10 12 14 14 20 20 16 18 Max 13 15 21 21 25 25 25 25 Unit ns ns ns ns ns ns Test Conditions Figures 1 & 2 CL = 45 pF Figures 1 & 2 Figures 4 & 5 Figures 3 & 5 Figures 3 & 5 Figures 4 & 5 CL = 45 pF RL = 667 CL = 5.0 pF RL = 667
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5
SN74LS257B SN74LS258B
PACKAGE DIMENSIONS
N SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE R
-A-
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
B
1 8
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
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SN74LS257B SN74LS258B
PACKAGE DIMENSIONS
D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J
-A-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
16
9
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
DIM A B C D F G J K M P R
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7
SN74LS257B SN74LS258B
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
North America Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 2:30pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 2:30pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 1:30pm to 5:00pm UK Time) Email: ONlit@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong 800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5487-8345 Email: r14153@onsemi.com Fax Response Line: 303-675-2167 800-344-3810 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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8
SN74LS257B/D


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